Register 2 of BLOCK0.
| VDD_SPI_DREFM | SPI regulator medium voltage reference. |
| VDD_SPI_DREFL | SPI regulator low voltage reference. |
| VDD_SPI_XPD | If VDD_SPI_FORCE is 1, this value determines if the VDD_SPI regulator is powered on. |
| VDD_SPI_TIEH | If VDD_SPI_FORCE is 1, determines VDD_SPI voltage. 0: VDD_SPI connects to 1.8 V LDO. 1: VDD_SPI connects to VDD_RTC_IO. |
| VDD_SPI_FORCE | Set this bit to use XPD_VDD_PSI_REG and VDD_SPI_TIEH to configure VDD_SPI LDO. |
| VDD_SPI_EN_INIT | Set SPI regulator to 0 to configure init[1:0]=0. |
| VDD_SPI_ENCURLIM | Set SPI regulator to 1 to enable output current limit. |
| VDD_SPI_DCURLIM | Tunes the current limit threshold of SPI regulator when tieh=0, about 800 mA/(8+d). |
| VDD_SPI_INIT | Adds resistor from LDO output to ground. 0: no resistance. 1: 6 K. 2: 4 K. 3: 2 K. |
| VDD_SPI_DCAP | Prevents SPI regulator from overshoot. |
| WDT_DELAY_SEL | Selects RTC watchdog timeout threshold at startup. 0: 40,000 slow clock cycles. 1: 80,000 slow clock cycles. 2: 160,000 slow clock cycles. 3: 320,000 slow clock cycles. |
| SPI_BOOT_CRYPT_CNT | Enables encryption and decryption, when an SPI boot mode is set. Feature is enabled 1 or 3 bits are set in the eFuse, disabled otherwise. |
| SECURE_BOOT_KEY_REVOKE0 | If set, revokes use of secure boot key digest 0. |
| SECURE_BOOT_KEY_REVOKE1 | If set, revokes use of secure boot key digest 1. |
| SECURE_BOOT_KEY_REVOKE2 | If set, revokes use of secure boot key digest 2. |
| KEY_PURPOSE_0 | Purpose of KEY0. Refer to Table Key Purpose Values. |
| KEY_PURPOSE_1 | Purpose of KEY1. Refer to Table Key Purpose Values. |